Define:
	- the nominal levels,
	- the threshold levels,
	- the noise margins,
	- fan-in and fan-out,
	- the propagation delay,
	- the rise and fall times.
Discuss the costs of an integrated circuit.
Discuss the Elmore delay formula.
Discuss the different electrical models of wires and the conditions under which they apply.
Discuss the CMOS inverter and explain its transfer characteristic.
Discuss how the noise margins of a CMOS inverter can be derived.
Discuss the propagation delay of a CMOS inverter.
Discuss CMOS buffer stages implemented with an inverter chain and their sizing.
Discuss power dissipation in CMOS inverters.
Draw a static complementary logic gate (FCMOS) that implements the following logic functions:
	y = NOT(A + (B + C) * D * E)
	Y = NOT((A + B)(C + D)E)
	Y = NOT(A B (C + D E))
Discuss the pseudo-NMOS inverter and its transfer characteristic.
Discuss Differential Cascode Voltage Switch Logic (DCVSL).
Discuss BiCMOS logic.
Discuss wired logic gates.
Discuss tri-state logic gates.
Discuss decoder/encoder/multiplexer/demultiplexer circuits.
Discuss NMOS transmission gates.
Discuss transmission logic gates.
Discuss single-phase dynamic logic and domino logic.
Discuss NOR and NAND gate ROM memory.
Discuss EPROM, EEPROM, and FLASH memories.
Discuss the programming mechanisms of dual-gate devices.
Discuss static RAM memory cells.
Discuss single-transistor dynamic RAM.