First level trigger - lunedì 13/04/2026 (14:00 - 17:00)
Aggregazione dei criteri
Implementation of first level trigger circuit for physics signals with FF and AND gate.
SET signal generated with
- Dual timer manual control
- VME control step-by-step: the SET signal of a VME pulser done first with an external manual switch, then with a software switch
- VME libraries
Ultime modifiche: martedì, 14 aprile 2026, 16:42